A parallel compact genetic algorithm for multi-FPGA partitioning
Hidalgo J. I., Baraglia R. Perego R., Lanchares J., Tirade F.
Multi-FPGA Parallel algorithms Processor architectures
In this paper we investigate the design of a compact genetic algorithm to solve Multi-FPGA Partitioning problems. Nowadays Multi-FPGA systems are used for a great variety of applications such as dynamically re-configurable hardware applications, digital circuit emulation, and numerical computation. Both a sequential and a parallel version of a compact genetic algorithm (cGA) have been designed and implemented on a cluster of workstations. The peculiarities of the cGA permits to save memory in order to address large Multi-FPGA Parfitioning problems, while the exploitation of parallelism allows to reduce execution times. The good results achieved on several experiments conduced on different Multi-FPGA Partitioning instances show that this solution is viable to solve Multi-FPGA Partitioning problems.
Source: Euromicro Workshop on Parallel and Distributed Processing, pp. 113–120, Mantova, Italy, 2001
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@inproceedings{oai:it.cnr:prodotti:91399,
title = {A parallel compact genetic algorithm for multi-FPGA partitioning},
author = {Hidalgo J. I. and Baraglia R. Perego R. and Lanchares J. and Tirade F.},
booktitle = {Euromicro Workshop on Parallel and Distributed Processing, pp. 113–120, Mantova, Italy, 2001},
year = {2001}
}
0000-0001-7189-4724