2000
Conference article
Unknown
Wafer-scale VLSI testing
Caruso A., Chessa S., Maestrini P.
Wafer scale integration Computer-communication networks VLSI systems Types and design styles
An abstract is not available.
Source: 12th Workshop on Testmethods and Reliability of Circuits and Systems, pp. 1–4, Grassau, Germany, 19-21 March 2000
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BibTeX entry
@inproceedings{oai:it.cnr:prodotti:406545,
title = {Wafer-scale VLSI testing},
author = {Caruso A. and Chessa S. and Maestrini P.},
booktitle = {12th Workshop on Testmethods and Reliability of Circuits and Systems, pp. 1–4, Grassau, Germany, 19-21 March 2000},
year = {2000}
}
0000-0002-6907-6527CNR ExploRA