Integrated performance models for SPMD applications and MIMD architectures

Cremonesi P, Gennaro C

Single program multiple data (SPMD)  Multiple instruction multiple (MIMD)  Performance model  Queuing network model  Fork-join queues  Mean value analysis (MVA)  Parallel I/O  Synchronization  Speedup surface  [Performance of systems  [Processor architectures  [Performance and reliability  [Input/output and data communications 

The report introduces queuing network models for the performance analysis of SPMD applications executed on general-purpose parallel architectures such as MIMD and clusters of workstations. The models are based on the pattern of computation, communication and I/O operations of typical parallel applications. Analysis of the models leads to the definition of speedup surfaces which capture the relative influence of processors and I/O parallelism and show the effects of different hardware and software components on the performance. Since the parameters of the models correspond to measurable program and hardware characteristics, the models can be used to predict the performance of parallel applications in early stages of software development.